Dan Clein

Dan Clein has vast experience in Physical Design. He is currently Technical Advisor to Sankalp Semiconductor and Manager of Mixed Signal Layout at PMC Sierra. He is the author of the ‘CMOS IC Layout’ book, which is a comprehensive treatise of all concepts and issues in Mixed Signal Layout. He has previously worked at Motorola, MOSAID.

Dan Clein has vast layout expertise of 24+ years in Memory (DRAM, SRAM, etc.), Full Custom, Analog and Mixed Signal and Digital. Dan Clein has designed chips from TBC (Token Bus Controller) in one metal technology to DSP96000, to DRAMS and other memories, to High Speed OC-192, 10 GHz in 0.13 microns. Dan is involved in training & teaching also. He has trained people in Motorola Semiconductor (Freescale, Israel) and people in MOSAID and PMC Sierra in professional courses on Layout, as 2-3 months training courses – about 7 times in Hebrew and English. Dan Clein has also taught at the Carleton University as a part of the Introduction to VLSI course for Master program 1995-1997 together with Gregg Shimokura and Martin Snelgrove. Currently, he is also training Sankalp Semiconductor people in professional courses on Layout.

Dan Clein has worked with most major EDA vendors to develop new tools and methodologies in physical design for the industry. He has worked with Mentor Graphics, Cadence, Sagantec, Synopsys and a few other smaller EDA startups.