Sankalp specializes in both ESD design and failure-analysis support, recognizing that such efforts can take months and cost tens of thousands of dollars for our customers. By using Sankalp’s support, our customers have achieved higher first pass success rate and met all ESD standards required for IO cells. They have also dramatically improved their debug time as well as getting the right solution at the first redesign, saving both money and time to market. We have extensive experience in designing ESD and I/O’s to not only meet ESD requirements, such as CDM (Charge-Device Model), HBM (Human Body Model), MM (Machine Model) and CDE (speculative Cable Discharge Models), but also the rigorous demands of DFM (Design for Manufacturing), SI (signal integrity) and power delivery as they become larger and larger problems at 65nm and below.

Area efficient and very robust ESD solutions for sensitive pins and IO’s are available. The emphasis on high performance, Low Cap ESD structures for very high performance applications is particular strength of Sankalp. These structures are precision tuned to provide robust HBM, CDM and MM performance for Gigabit serial interfaces. The ESD library is a fully versatile compilation of structures, sub-cells and components that are easily tailored to a custom or unique IO, padring and product design. It is developed with the idea that all structures and power bussing will be tailored and optimized for the product into which they are designed.